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Fisher, a former Yale computer scientist who founded Multiflow in He said Multiflow designers were designing a new computer to speed its original software strategy.


Fisher said, is that it offers the advantages of parallel computing without requiring programmers to alter the way they work. The Multiflow design, which executes as many as 28 instructions simultaneously is an extreme example of VLIW, but it has generated wider interest and other designers are beginning to apply the technology.

Multiflow Projects — ADMIT documentation

At Carnegie Mellon University H. The group is designing a second generation computer, referred to as iWarp, with the Intel Corporation. Because the chip contains both a standard processor and a floating-point, or specialized mathematical, processor, it can under many conditions issue two instructions simultaneously. Computer scientists say that when the Motorola microprocessor is introduced later this year it will have similar features: the ability to initiate several instructions simultaneously on the same piece of silicon.

Other computer designers are also moving in this direction. RISC originally grew from the observation made by researchers in the 's that most programs spend the bulk of their time executing just a few of the hundreds of instructions available to programmers. RISC was intended to simplify computer designs by radically reducing the number of computer instructions and by concentrating on executing individual instructions as quickly as possible.

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Executing Instructions in Parallel for Faster Computing Ordinarily, a computer's central processing unit executes instructions one at a time. In the example at left, eight ticks of the computer's clock are required to add two sums, multiply them and store the answer.

By creating sophisticated software, multiple processors can be used to combine steps and reach the same result in only four ticks of the clock, creating a faster computer, above. A typical central processing unit would load B; then load C; add B and C and hold the sum; load D; load E; add D and E and hold the sum; multiply the two sums; store A, the resultant product, in the computer memory.

Using software and more than one central processing unit, this strategy loads B, C, D and E in one tick of the clock; performs the two additions in the next clock cycle; performs the multiplication in the third cycle, and stores the answer in the fourth cycle. The total operation is twice as fast. Please upgrade your browser.

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